During the execution of loads and stores within the context of a microprocessor, data patterns arise in which a relatively small window of memory is written to and read from at a heightened frequency. Such a memory region is said to have a high temporal locality of reference. One example is the software stack—the stack is constantly being pushed to and pulled from as procedures are called and returned from.
Memory regions with a high temporal locality of reference require more power than regions with lower temporal locality of reference because these regions of memory are often marked as cacheable in the page table, and therefore each push to the stack could result in a significant power draw whenever the large cache structure is written. Further, it is disadvantageous to keep cache fill buffers allocated for regions of memory that do not have a high temporal locality of reference, as fill buffer availability generally translates into throughput for a storage-unit. Additionally, if the life-cycle of the fill buffers is not managed, the allocation and de-allocation of multiple fill buffers for the same region of memory will over time introduce further power issues.
This is an issue in the context of power-critical spaces, such as the microprocessor of a mobile device. Power profiles of microprocessors have become increasingly critical as the demand for longer battery life in mobile devices has elevated.